National Repository of Grey Literature 5 records found  Search took 0.01 seconds. 
Hardware for lightweight cryptographic implementation
Jedlička, Jakub ; Cíbik, Peter (referee) ; Smékal, David (advisor)
This bachelor thesis deals with the topic of lightweight cryptography and the implementation of a selected cipher on a field programmable gate array (FPGA). Thesis first deals with the theory, where hardware elements, general cryptography and lightweight cryptography are described with focus on the LBlock and PRESENT ciphers. It then describes the selection of a cipher type and then the selection of a particular lightweight cryptography cipher. Next the LBlock cipher is selected, implemented, and tested as a custom intellectual property (IP) block using a hardware descriptive language for very fast integrated circuits (VHDL). This block is used in the block design to implement the encryptor on the ZYBO-Z7 development board. The input and output data handling is implemented on the Zynq-7000 processing system chip, which passes the data to the programmable logic. Finally this communication and implementation is described where the operational modes used for the LBlock cipher are cipher feedback mode and output feedback mode. For these operational modes, measurements are made to determine the encryption speed of the data stored on the microSD card and the pitfalls resulting from this encryption are described.
Communication in a hardware accelerated circuit
Rosa, Michal ; Jedlička, Petr (referee) ; Smékal, David (advisor)
Field Programmable Gate Arrays (FPGAs) are semiconductor devices that are based around a matrix of configurable logic blocks (CLBs) connected via programmable interconnects. FPGAs can be reprogrammed to desired application or functionality requirements after manufacturing. This feature distinguishes FPGAs from Application Specific Integrated Circuits (ASICs), which are custom manufactured for specific design tasks. Although one-time programmable (OTP) FPGAs are available, the dominant types are SRAM based which can be reprogrammed as the design evolves.
Communication in a hardware accelerated circuit
Rosa, Michal ; Jedlička, Petr (referee) ; Smékal, David (advisor)
Field Programmable Gate Arrays (FPGAs) are semiconductor devices that are based around a matrix of configurable logic blocks (CLBs) connected via programmable interconnects. FPGAs can be reprogrammed to desired application or functionality requirements after manufacturing. This feature distinguishes FPGAs from Application Specific Integrated Circuits (ASICs), which are custom manufactured for specific design tasks. Although one-time programmable (OTP) FPGAs are available, the dominant types are SRAM based which can be reprogrammed as the design evolves.
Custom Intellectual Property Block For Lblock Cipher
Jedlička, Jakub
This paper presents the implementation of a lightweight cryptographic cipher for a hardware-constrained device. Describes the basic problems of lightweight cryptography on the field programmablegate array (FPGA) and its one representative cipher LBlock. Furthermore deals with theimplementation of the LBlock cipher in a very high speed integrated circuit hardware description language(VHDL) on the FPGA. The LBlock cipher is used with a custom advanced extensible interface(AXI) wrapper for the creation of a custom intellectual property (IP) block. This IP block will be usedto cipher files on the development board ZYBO Z7-20 powered by Zynq-7000. The final part of thepaper describes testing of the IP block with a defined set of the inputs and the outputs are validatedwith the correct outputs.
Hardware for lightweight cryptographic implementation
Jedlička, Jakub ; Cíbik, Peter (referee) ; Smékal, David (advisor)
This bachelor thesis deals with the topic of lightweight cryptography and the implementation of a selected cipher on a field programmable gate array (FPGA). Thesis first deals with the theory, where hardware elements, general cryptography and lightweight cryptography are described with focus on the LBlock and PRESENT ciphers. It then describes the selection of a cipher type and then the selection of a particular lightweight cryptography cipher. Next the LBlock cipher is selected, implemented, and tested as a custom intellectual property (IP) block using a hardware descriptive language for very fast integrated circuits (VHDL). This block is used in the block design to implement the encryptor on the ZYBO-Z7 development board. The input and output data handling is implemented on the Zynq-7000 processing system chip, which passes the data to the programmable logic. Finally this communication and implementation is described where the operational modes used for the LBlock cipher are cipher feedback mode and output feedback mode. For these operational modes, measurements are made to determine the encryption speed of the data stored on the microSD card and the pitfalls resulting from this encryption are described.

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